FCVG_REG(3X) — NEWS-OS Programmer’s Manual

NAME

fcvg_reg_r, fcvg_reg_w − functions for status register of the FCVG device

SYNOPSIS

#include <fcvg.h>

int fcvg_reg_r(bit)
int bit;

int fcvg_reg_w(bit, mask)
int bit, mask;

DESCRIPTION

These functions operate on the status register of the FCVG device.

fcvg_reg_r
Reads out the contents of the bit specified with bit in the status register of the FCVG device. The values which can be specified to bit are shown below:

FCVG_REG_ALLAll bits
FCVG_REG_SCRSTPSCRSTP bit
FCVG_REG_LINTLINT bit
FCVG_REG_PHASEPHASE bit
FCVG_REG_SUBSWSUBSW bit
FCVG_REG_MIHMIH bit
FCVG_REG_MIVMIV bit
FCVG_REG_FREZFREZ bit
FCVG_REG_HCANHCAN bit
FCVG_REG_CHASWCHASW bit
FCVG_REG_VDSETVDSET bit
FCVG_REG_MIXMIX bit
FCVG_REG_OUTSLOUTSL bit
FCVG_REG_INSLINSL bit
FCVG_REG_EEEE bit

When FCVG_REG_ALL is specified to bit, all contents of the status register (16 bits) are returned to the lower 16 bits. Of this lower 16 bits, address 0x0 of the status register is set to the upper 8 bits, and address 0x1 to the lower 8 bits.

When a value other than FCVG_REG_ALL is set to bit, the value of the corresponding bit is returned.
For example, when the following statement is executed, the content of the HCAN bit (0 or 1) is returned.

fcvg_reg_r(FCVG_REG_HCAN)

fcvg_reg_w
Writes data to the status register. The value of the lower 16 bit specified with mask is written in the bits specified with bit. Of this lower 16 bits, the upper 8 bits corresponds to the address 0x0 of the status register and the lower 8 bits corresponds to the address 0x1.
For example, when the following statement is executed,

fcvg_reg_w(FCVG_REG_ALL, FCVG_REG_HCAN|FCVG_REG_VDSET)

the HCAN and VDSET bits are set to 1 and other register is set to 0. On the one hand, when a value other than FCVG_REG_ALL is specified to bit, specify 0 or 1 to mask. At this time, a value specified with mask is written only into the bit specified with bit, and the values of the other registers are stored as it is.
For example, when the following statement is executed,

fcvg_reg_w(FCVG_REG_HCAN, 1)

the HCAN bit is set to 1 and the other bits are not changed. When the following statement is executed,

fcvg_reg_w(FCVG_REG_HCAN|FCVG_REG_VDSET, 1)

the HCAN and VDSET bits are set to 1 and the other bits are stored as it is.

RESTRICTION

fcvg_reg_w only writes data to the status register. So the register which is not supported by the hardwares can also be specified.

FILES

/usr/src/sony/lib/libfcvg/∗ directory for the source code of the library

/usr/sony/demo/NWB224 directory for a sample program

/usr/sony/lib/libfcvg.a FCVG library

/usr/sony/include/fcvg.h header file

/usr/sony/include/fcvg_lib.h header file

/usr/sony/include/fcvg_reg.h header file

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