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MIPS4(5)                                                              MIPS4(5)



NAME
     mips4 - MIPS4 architecture extensions and the -mips4 compiler option

SYNOPSIS
     cc -mips4 [ options ] ... file ...
     f77 -mips4 [ options ] ... file ...
     as -mips4 [ options ] ... file ...

DESCRIPTION
     The MIPS4 instruction set extensions consist of a backward compatible
     superset of the MIPS3 instruction set.  The MIPS4 extensions are intended
     primarily to provide better performance in floating point numeric
     processing.  These features are currently supported under IRIX 6.2 and
     later releases running on machines with the R8000, R10000, or R5000
     microprocessors.

     The MIPS4 instruction set extensions provide the following features:

     ⊕    A new set of multiply-add instructions takes advantage of the fact
          that the majority of floating point computations use the chained
          multiply-add paradigm.  These instructions have lower inherent
          latency (temporary result need not be written back to a register)
          and higher performance (fewer instructions to fetch and decode).
          The multiple-add instructions on an R8000 (but not on R5000 or
          R10000) does not perform intermediate rounding, for even lower
          latency.

     ⊕    A register + register addressing mode for floating point loads and
          stores eliminates the extra integer add required in many array
          accesses.  (Register + register addressing for integer memory
          operations is not supported.)

     ⊕    A set of four conditional move operators allows some simple ``IF''
          statements to be represented without branches.  ``THEN'' and
          ``ELSE'' clauses are computed unconditionally and the results placed
          in a temporary register.  Conditional move operators then select the
          correct temporary result.

     ⊕    Memory prefetch instructions to better manage data cache behavior in
          memory intensive algorithms.  [NOTE:  prefetch instructions are not
          supported on the R8000.  See mipscheck(1) ]

     Programs compiled with the -mips4 option conform to the Mips 64-bit
     application binary interface (ABI64) or n32 ABI (ABIn32), rather than the
     original MIPS ABI (ABIo32).  Each of the 3 ABIs is distinct and object
     files compiled to one ABI cannot be linked to object files (including
     archives and DSOs) compiled to another ABI.

SEE ALSO
     Assembly Language Programmer's Guide.
     MIPSpro Application Porting and Transition Guide
     MIPS RISC Architecture, Gerry Kane and Joe Heinrich, Prentice Hall.



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MIPS4(5)                                                              MIPS4(5)



     MIPS R4000 User's Manual, Joseph Heinrich, Prentice Hall.
     cc(1), f77(1), pc(1), CC(1), as(1), mips2(5)





















































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