deserialize_memory_access(D3D) —
.IX \f4deserialize_memory_access\fP(D3D)
NAME
deserialize_memory_access − allow processor to concurrently access memory
SYNOPSIS
#include <sys/types.h>
#include <sys/ddi.h>
(void) deserialize_memory_access();
DESCRIPTION
Many processors execute and complete load and store instructions in the order in which they are encountered. For instance, if a program has a store instruction followed by a load instruction, the processor will execute the store instruction, and then the load instruction. Some processors, for efficiency reasons, overlap instruction executions and do not necessarily finish instructions in the same order as they begin them. Consider a possible execution of the previous example on such a processor: the store will be issued, then the load will be issued, but the load instruction may complete before the store instruction does.
Normally, this is not a problem because the processor will produce results in memory that are the same as if all loads and stores were executed in program order. Note, however, that this is because the memory system functions correctly regardless of the order of loads and stores. That is, a store to address A won’t change the results of a load from address B, for distinct addresses A and B. However, some hardware devices and their drivers require that the loads and stores be visible to the device in a specific order. In such a case, a processor must perform the instructions in a serialized fashion to guarantee correct behavior.
deserialize_memory_access allows a processor that has been put into serialized memory access mode to resume concurrent memory accesses.
LEVEL
Base or Interrupt.
NOTES
If memory access has been serialized using serialize_memory_access, this function should be invoked before calling sleep or longjmp, or similar functions.
Processors that cannot perform concurrent loads and stores are not affected by this function.
SEE ALSO
serialize_memory_access(D3D), sysm68k(2), sysm88k(2)
DDI