MAKE(1,C) AIX Commands Reference MAKE(1,C)
-------------------------------------------------------------------------------
make
PURPOSE
Maintains up-to-date versions of programs.
SYNTAX
+------------------+ +-------------------+
make ---| one of |---| |--->
| +----+ | +--- -f makefile ---+
| | -n | | ^ |
| +----| -t |----+ | +---------------+
+-| +----+ |-+
| +----------+ |
+-| -m -d -e |-+
^| -k -s -p ||
|| -i -q -r ||
|+----------+|
+------------+
+----------------+ +--------------+
>---| |---| |---|
+--- name=def ---+ +--- target ---+
^ | ^ |
+------------+ +----------+
Note: This command does not have MBCS support.
DESCRIPTION
The make command reads makefile for information about the specified target
files and for the commands necessary to update them. make does not change the
target if you have not changed any of the source files since you last built it.
It considers a missing file to be a changed file (out of date).
You can also include macro definitions on the command line after all of the
flags. Macro definitions have the form:
macro-name = string
See "Macros" for more information about macros and their uses.
The make command considers all entries on the command line that follow the
flags and that do not contain an equal sign to be target file names.
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Description File
The description file contains a sequence of entries specifying the files that
the target files depend on. The general form of an entry is:
targ [targ]...:[:][file]...[; cmd]...[#]
[cmd]... [#]
The first line of an entry (called the dependency line), contains a list of
targets followed by a : (colon) and an optional list of prerequisite files or
dependencies. If you put shell commands on the dependency line, they must be
preceded by a ";" (semicolon). All commands that follow the semicolon and all
following lines that begin with a tab contain shell commands that make uses to
build the target.
To specify more than one set of commands, you must enter more than one
dependency definition. In this case, each definition must have the target name
followed by two colons (::), a dependency list, and a command list.
The first line that does not begin with a tab or "#" (hash sign) begins a new
dependency or a macro definition. Command lines are performed one at time,
each by its own subshell. Thus, the effect of some shell commands, such as cd,
does not extend across new-line characters. You can, however, put a \
(backslash) at the end of a line to continue it on the next physical line. A
comment begins with a "#" and ends with a new-line character.
The first one or two characters in a command can be one of the following
special characters:
- Ignores errors returned by the command on this line.
@: Does not display this command line.
-@
@- Does not display this command line and ignores errors.
Suffixes
The make command has default rules that govern the building of most standard
files. These rules depend on the standard suffixes used by the system utility
programs to identify file types. These rules define the starting and ending
file types so that, for example, given a specified .o file, make can infer the
existence of a corresponding .c file and knows to compile it using the "cc -c"
command.
A rule with only one suffix (that is, .c:) defines the building of prog from
all its source files. Use a ~ (tilde) in the suffix to indicate a SCCS file.
For example, the ".c~.o" rule governs changing an SCCS C source file into an
object file. You can define rules within the description file. make
recognizes as a rule any target that contains no slashes and starts with a dot.
You can also add suffixes to the list of suffixes recognized by make and add to
the default dependency rules. Use the target name .SUFFIXES followed by the
suffixes you want to add. Be careful of the order in which you list the
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suffixes. make uses the first possible name for which both a file and a rule
exist. The default list is:
.SUFFIXES: .o .c .c~ .y
.y~ .l .l~ .s .s~
.sh .sh~ .h .h~
You can clear the list of suffixes by including .SUFFIXES: with no following
list.
Special Target Names
You can use some special target names in the description file to tell make to
process the file in a different manner. The special target names are:
.DEFAULT The commands that appear after this name in the
description file tell make what to do if it can find no
commands or default rules to tell it how to create a
specific file.
.IGNORE If this name appears on a line by itself, make does not
stop when errors occur. Using a - (minus) as the first
character on a line in the description file tells make to
ignore errors for the command on that line.
.PRECIOUS The files named on the same line as this special name are
not removed when make is interrupted.
.SILENT If this name appears on a line by itself, make does not
display any of the commands that it performs to build a
file.
.SUFFIXES Use this name to add more suffixes to the list of file
suffixes that make recognizes.
Environment
When you run make, it reads the environment and treats all variables as macro
definitions. The make command processes macro definitions in the following
order: internal (default) definitions, shell environment variables,
description file macros, then command line macro definitions. Therefore, macro
assignments in a description file normally override duplicate environment
variables. The -e flag instructs make to use the environment variables instead
of the description file macro assignments. Command line macro definitions
always override definitions in the environment, descriptions file, and the
internal definitions.
The make command recognizes a macro MAKEFLAGS, which can be assigned any make
command line flag except -f, -p, and -d. When make begins, it assigns the
current flags to MAKEFLAGS. It passes this variable to any commands it
invokes, including additional invocations of make itself. Thus you can perform
a make -n recursively on a software system to see what would have been
performed. The -n is put in MAKEFLAGS and passed to further copies of the
shell that runs the next level of make commands. In this way, you can check
all of the description files for a software project without actually compiling
the project.
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MFLAGS are the same as MAKEFLAGS except MFLAGS includes a leading "-" (dash) if
there is at least one flag present.
Macros
Entries of the form "string1 = string2" are macro definitions. "string2" can
consist of all characters that can occur on a line before a comment character
("#") or before a new-line character that is not a continuation line. After
this macro definition, make replaces each "$(string1)" in the file with
"string2". You do not have to use the parentheses around the macro name if the
macro name is only one character long and there is no substitute sequence (see
the next paragraph). If you use the following form, you can also replace
characters in the macro string with other characters for one time that you use
the macro:
$(string1[:subst1=[subst2]])
The optional ":subst1 = subst2" + specifies a substitute sequence. If you
specify a substitute sequence, make replaces each "subst1" in the named macro
with "subst2" (if "subst1" does not overlap with another "subst1"). Strings in
a substitute sequence begin and end with any of the following: a blank, tab,
new-line character, or beginning of line. See "Libraries" for an example of
the use of the substitute sequence.
Note: Because make uses the dollar sign symbol ("$") to designate a macro, do
not use that symbol in file names of targets and parents, or in commands
in the description file unless you are using a defined make macro.
Internal Macros
The make command has five internal macros. It assigns values to these macros
under one or more of the following conditions:
o When it uses an internal rule to build a file.
o When it uses a .DEFAULT rule to build a file.
o When it uses rules in the description file to build a file.
o When the file is a library member.
They are defined as follows:
$* The file name (without the suffix) of the source file. The make command
only evaluates this macro when applying inference rules.
$@ The full target name of the current target. $$@ expands to the current
target name when specified to the right of ":" on dependency lines.
$< The source files of an out-of-date module. make evaluates this macro when
applying inference rules or the .DEFAULT rule. For example:
.c.o:
cc -c $<
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Here, "$<" is the equivalent of "$*" and refers to the .c file of any
out-of-date .o file.
"$?" The list of out-of-date files. make evaluates this macro when it
evaluates explicit rules from makefile.
"$%" The name of an archive library member. make evaluates this macro only if
the target is an archive library member of the form lib(file.o). In this
case, "$@" evaluates to lib and "$%" evaluates to the library member,
file.o. $$% is recognized to the right of ":" on dependency lines to be
the library member. $$% is related to $% as $$@ is related to $@. This
allows for explicit ".c.a" rules to be specified.
You can add an uppercase D or F to indicate "directory part" or "file part",
respectively, to all internal macros except for "$?". Thus, "$(@D)" refers to
the directory part of the name "$@". If there is no directory part, make uses
"./".
Libraries
If a target name contains parentheses, make considers it an archive library.
The string within parentheses refers to a library member. Thus, lib(file.o)
and $(LIB)(file.o) both see an archive library which contains file.o. (You
must have defined the LIB macro already.) The expression "$(LIB)+ (file1.o
file2.o)" is not legal.
Rules that apply to archive libraries have the form "x.a", where ".x" is the
suffix of the file you want to add to an archive library. For example, ".c.a"
indicates a rule that changes any C source file to a library file member. The
following lines give the default rule for this change:
lib: lib(file.o) lib(file.o) lib(file.o)
@echo lib is now up to date
.c.a:
$(CC) -c $(CFLAGS) $<
ar rv $@ $*.o
rm -f $*.o
".x" must be different from the suffix of the archive member. Therefore, you
cannot have "lib(file.o)" depend upon "file.o".
Another, but more limited, example of an archive library maintenance rule
follows:
lib: lib(file.o) lib(file.o) lib(file.o)
$(CC) -c $(CFLAGS) $(?:.o=.c)
ar rv lib $?
rm $? @echo lib is now up to date
.c.a:;
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This example rule uses a substitute sequence (".o=.c") to replace with .c files
all .o files generated by the "$?" macro. The "$?" list is the set of object
file names (inside lib) with C source files that are out of date. The macro
substitution translates .o to .c.
If this rule appears in your description file, it disables the default ".c.a:"
rule, which creates each object file one by one. This type of organization
speeds up archive library maintenance, but becomes hard to use if the archive
library contains a mix of assembly programs and C programs.
The $$% macro allows the ".c.a:" rule to be specified as follows:
lib(file1.o) lib(file2.o) lib(file3.o): $$(%:.o=.c)
$(CC) -c $(CFLAGS) $(%:.o=.c)
ar rv $@ $%
rm $%
This is equivalent to specifying:
lib(file1.o): file1.c
$(CC) -c $(CFLAGS) $(%:.o=.c)
ar rv $@ $%
rm $%
lib(file2.o): file2.c
$(CC) -c $(CFLAGS) $(%:.o=.c)
ar rv $@ $%
rm $%
lib(file3.o_: file3.c
$(CC) -c $(CFLAGS) $(%:.o=.c)
ar rv $@ $%
rm $%
Make recognizes two commands which affect make file processing:
include file
oinclude file
When make encounters these commands it opens the name "file" and reads "file"
as if the contents of the file were actually present in the original file.
This process can be nested.
If the file is not present, oinclude will disregard the command as if it were
not specified, while the include command will cause make to exit with a fatal
error.
FLAGS
-d Displays detailed information about the files and times
that make examines (debug mode).
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-e Uses environment variables in place of any assignments
made within description files. These assignments
normally replace environment variables.
-f makefile Reads makefile for a description of how to build the
target file. If you give only a - (minus) for makefile,
make reads standard input. If you do not use the -f
flag, make looks in the current directory for a
description file named makefile, Makefile, s.makefile, or
s.Makefile. You can specify more than one description
file by entering the -f flag more than once (with its
associated makefile parameter).
-i Ignores error codes returned by commands. make normally
stops if a command returns a nonzero code. Use this flag
to compile several modules only if you want make to
continue when an error occurs in one of the modules. Do
not link the resulting modules when you use this flag.
-k Stops processing the current target if an error occurs
but continues with other branches that do not depend on
that target.
-m Prints memory map when exiting program.
-n Displays commands but does not run them. Displays lines
beginning with an "@" (at sign). If the command in the
description file contains the string "$(MAKE)", perform
another call to make (see the discussion of the MAKEFLAGS
macro on page 3). Use this flag to preview the
performance of make.
-p Displays the complete set of macro definitions and target
descriptions before performing any commands.
-q Returns a zero status code if the target file is up to
date; returns a nonzero status code if the target file is
not up to date.
-r Does not use the default rules.
-s Does not display commands on the screen as they are
performed.
-t Changes only the date of the files, rather than
performing the listed commands. Use this flag if you
have made only minor changes to a source file that do not
affect anything outside of that file. This flag changes
the date of all target files that appear on the command
line or in the description file.
-T Directs make to print to standard out.
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EXAMPLES
1. To make the file specified by the first entry in the description file:
make
2. To display, but not run, the commands that make would use to make a file:
make -n search.o
You may want to do this to verify that a new description file is correct
before using it.
3. To save the internal rules in a file:
make -p -f /dev/null 2> /dev/null > defaults
This lists the internal rules and macros and saves them in the file
"defaults" for viewing or editing. All exported shell environment
variables are included in the list of macro definitions.
4. To generate dependency trigger information:
make -T -f makefile
If file "stdio.h" and "h.c" were newer than target "execute" the following
makefile rules:
all: default
default: execute
execute: x.o h.o
cc -o execute x.o h.o
x.o: /usr/include/stdio.h x.c
cc -c x.c
h.o: h.c /usr/include/params.h
cc -c h.c
would generate the following trigger information:
/usr/include/stdio.h<-x.o<-execute<-default<-all
/source/h.c<-h.o<-execute<-default<-all
FILES
Makefile
makefile
s.Makefile
s.makefile
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RELATED INFORMATION
See the discussion of make in AIX Operating System Programming Tools and
Interfaces.
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