NAME

hvme − Harris Enhanced VME Bus

DESCRIPTION

HVME is an acronym for the Harris Enhanced VME bus.  HVME is a superset of the VME standard with proprietary extensions to boost I/O throughput.  HVME I/O controllers such as the HDC and HSA are triple height (9u) cards that make use of some signals from the third connector (P3) that standard 6u VME cards do not have.  HVME cards use this additional connector to draw extra power and to support a synchronous block transfer capability that does not exist on a standard VME bus. 

The HVME bus also provides for slot based addressing.  By this we mean that the actual address of the controller in the 32 bit VME address space is a function of the slot into the card has been installed.  The controllers address also depends on the Module ID of the board, the bus to which it is installed (Primary or Secondary I/O).  This slot based addressing eliminates the need for address jumpers on HVME I/O controllers.  Mechanical

The form factor of HVME cards is VME standard 9u form factor and the depth of the HVME card cage is 280 mm.  The usage of the signals of the P3 connector is Harris proprietary. Of course, the HVME bus can accommodate any standard 6u VME card (eg. Double Eurocard form factor).  It accomplishes this through the use of an adaptor card to which the Eurocard is attached.  The Eurocard is attached to the adaptor card so that P1 and P2 are provided by the Eurocard itself with the adaptor card providing P3.  The adaptor card provides its own stiffener that attaches the card assembly to the card cage.  For proper attachement of the Eurocard to the adapter, the Eurocard’s own stiffener will usually need to be removed.  Pre-Planned Product Improvement

The HVME form factor allows for more complex single card designs without having to resort to multiple cards "sandwiches" so that designs could be made to fit into the standard 6u VME format.  A single HVME card cage and backplane can hold not only I/O controllers, but all system boards as well.  This not only simplifies the chassis design, but it also make upgrades a snap.  Since the form factor, chassis, and I/O backplane are the same for Night Hawk computers, upgrades to newer and faster systems is as easy as swapping CPU and memory boards.  This is the essence of Harris’ Pre-Planned Product Improvement strategy.  Bus Addresses

Base VME addresses of HVME controllers are formed in the following fashion:

      Address3322 2222 2222 1111 1111 11
       Bit1098 7654 3210 9876 5432 1098 7654 3210
 1B0S SSSS MMMM MMMM xxxx xxxx xxxx xxxx
 Where
B = 1, if primary I/O bus
    0, if secondary I/O bus
       S = HVME slot number (1 - 21)
 M = HVME board module ID
 x = offset within the HVME board address range
  Defined HVME board module IDs include:
 1  -  HDC   (HVME Disk Controller)
2  -  HVIOC (HVME I/O Controller)
3  -  HMPCC (HVME Multi Protocol Communications Controller)
4  -  HSA   (HVME SCSI Adaptor)
5  -  HRM   (HVME Reflective Memory)
 

As an example, consider an HDC configured in slot 4 of a primary HVME bus.  This HDC’s base address would be 0xC4010000.  Alternatively, an HSA configured in the slot 18 (0x12) of the primary HVME bus will map 0xD2040000 as its base address.  Please note that this algorithm only applies to the addresses of HVME controllers.  Standard VME cards will still need to have VME addresses per the manufacturers directions. Harris assigns and tracks addresses of all these standard VME controllers used on Night Hawk systems as well. Software Configuration

The HVME bus is configured identically to its predecessor the VERSAbus as is an ordinary VME bus.  The /etc/master system configuration file will have a single line defining the primary I/O bus, and an optional second line that defines a secondary bus.  An example section from a configuration file listed below illustrates the configuration of a dual I/O bus machine.  The syntax only changes if we do not have a secondary I/O bus regardless of the actual types of these busses.  In this case, the line defining "vba1" is removed or commented out by placing a ’#’ in the first column of the record. 

 controllervba0
controllervba1
 controllerhd0at vba? csr 0x04vector hdintr
controllerhd1at vba? csr ?vector hdintr
controllerhs0at vba0 csr 0x03vector hsintr
controllerhs1at vba1 csr ?vector hsintr
 

The second portion of this config file segment illustrates how HVME controllers can be self configuring with respect to their VMEbus address.  The question marks above tell the system initialization logic not to look at a fixed VMEbus address, but rather to check all addresses that correspond to the variable parameter (csr/slot# or vba#/bus#).  It is recommended that whenever a system configuration file is created by modifying one of the templates delivered with each new CX/UX software release, these question marks be replaced by the actual slot # or bus number, so that the correct hardware configuration is documented in /etc/master.  Performance

The HVME bus synchronous block transfer capability allows an HVME controller to send/receive 16 32-bit words (64 bytes) at a rate of 1 word every 100 nanoseconds or 40 Mbytes/sec.  Of course, in most cases, the performance of the CPU/memory system limits the sustainable HVME I/O throughput to something less than 40 Mbytes/sec. 

FILES

/etc/master  -  System configuration file

SEE ALSO

config(1M), master(4), hdc(7), hsa(7)

CX/UX Administrator’s Reference